A Research Team Led by Prof. Kevin J. CHEN Manifest the Feasibility of Gan/Sic Integration by Developing High-Quality Gan Epilayer on 4° Off-Axis 4h-Sic Substrate

A Research Team Led by Prof. Kevin J. CHEN Manifest the Feasibility of Gan/Sic Integration by Developing High-Quality Gan Epilayer on 4° Off-Axis 4h-Sic Substrate

ECE PhD student Sirui FENG, Research Assistant Professor Zheyang ZHENG, and other graduate students led by Prof. Kevin J. CHEN have developed a GaN epitaxy technique on a conventional 4° off-axis 4H-SiC substrate and demonstrate the epilayer’s high quality and suitability for constructing GaN-based high electron mobility transistors (HEMTs). The results suggest a practical approach to realizing monolithic integration of GaN HEMT and SiC junction field-effect transistor. The team revealed a distinct two-step strain relaxation process in the off-axis GaN/AlN/SiC heterostructure and offered a fundamental understanding and design guidelines of such an unconventional epitaxy technique. Their research paper has been published in Advanced Materials.

Feng, S., Zheng, Z., Cheng, Y., Ng, Y. H., Song, W., Chen, T., Zhang, L., Liu, K., Cheng, K. & Chen, K. J., “Strain release in GaN epitaxy on 4° off-axis 4H-SiC”, Advanced Materials (2022), 2201169.

https://onlinelibrary.wiley.com/doi/full/10.1002/adma.202201169

Figure 1. Strain release in GaN epitaxy on 4° off-axis 4H-SiC

Figure 2. Prof. Kevin Chen (Left), PhD student Sirui FENG (Middle) and, Dr. Zheyang ZHENG (Right)