涂 鋒 斌
Fengbin Tu is currently an Adjunct Assistant Professor in the Department of Electronic and Computer Engineering at The Hong Kong University of Science and Technology. He is also a Postdoctoral Fellow at the AI Chip Center for Emerging Smart Systems (ACCESS), Hong Kong, China. He received the Ph.D. degree from the Institute of Microelectronics, Tsinghua University, Beijing, China, in 2019, and received the B.S. degree from the School of Electronic Engineering, Beijing University of Posts and Telecommunications, Beijing, China, in 2013. Dr. Tu was a Postdoctoral Scholar at the Scalable Energy-efficient Architecture Lab (SEAL), the Department of Electrical and Computer Engineering, University of California at Santa Barbara, CA, USA, from 2019 to 2022. His research interests include AI chip, computer architecture, reconfigurable computing, and computing-in-memory. He designed the AI chip Thinker and won the 2017 ISLPED Design Contest Award. His Ph.D. dissertation was recognized by the Tsinghua Excellent Dissertation Award in 2019. He has published two books, Artificial Intelligence Chip Design in 2020, and Architecture Design and Memory Optimization for Neural Network Accelerators in 2022. Dr. Tu's research has been published at top conferences and journals on integrated circuits and computer architecture, including ISSCC, JSSC, DAC, ISCA, MICRO, and ASPLOS.